Method of forming transistor with increased gate width

摘要

Methods of forming transistor devices having an increased gate width dimension are disclosed. In one example, the method includes forming an isolation structure in a semiconducting substrate, wherein the isolation structure defines an active region in the substrate, performing an ion implantation process on the isolation structure to create a damaged region in the isolation structure and, after performing the implantation process, performing an etching process to remove at least a portion of the damaged region to define a recess in the isolation structure, wherein a portion of the recess extends below an upper surface of the substrate and exposes a sidewall of the active region. The method further includes forming a gate insulation layer above the active region, wherein a portion of the insulation layer extends into the recess, and forming a gate electrode above the insulation layer, wherein a portion of the gate electrode extends into the recess.

主权项

1. A method of forming a transistor, comprising:
forming a silicon dioxide isolation structure in a semiconducting substrate, said silicon dioxide isolation structure defining an active region in said substrate; performing an ion implantation process using an electrically neutral material on an entire upper surface of said silicon dioxide isolation structure to create a damaged region in said silicon dioxide isolation structure, wherein said damaged region of said silicon dioxide isolation structure etches at a faster rate than an undamaged region of said silicon dioxide isolation structure; after performing said ion implantation process, performing an etching process to remove at least a portion of said damaged region to thereby define a recess in said silicon dioxide isolation structure, wherein a portion of said recess extends below an upper surface of said semiconducting substrate and exposes a sidewall of said active region; forming a gate insulation layer above said active region, wherein a portion of said gate insulation layer extends into said recess; and forming a gate electrode above said gate insulation layer, wherein a portion of said gate electrode extends into said recess.