发明名称 PCI express tunneling over a multi-protocol I/O interconnect
摘要 Described are embodiments of methods, apparatuses, and systems for PCIe tunneling across a multi-protocol I/O interconnect of a computer apparatus. A method for PCIe tunneling across the multi-protocol I/O interconnect may include establishing a first communication path between ports of a switching fabric of a multi-protocol I/O interconnect of a computer apparatus in response to a peripheral component interconnect express (PCIe) device being connected to the computer apparatus, and establishing a second communication path between the switching fabric and a PCIe controller. The method may further include routing, by the multi-protocol I/O interconnect, PCIe protocol packets of the PCIe device from the PCIe device to the PCIe controller over the first and second communication paths. Other embodiments may be described and claimed.
申请公布号 US8782321(B2) 申请公布日期 2014.07.15
申请号 US201213369140 申请日期 2012.02.08
申请人 Intel Corporation 发明人 Harriman David J.;Dan Maxim
分类号 G06F13/00 主分类号 G06F13/00
代理机构 Schwabe, Williamson & Wyatt, P.C. 代理人 Schwabe, Williamson & Wyatt, P.C.
主权项 1. A method comprising: establishing, by a multiprotocol input-output (I/O) interconnect of a computer apparatus, a first communication path between ports of a switching fabric of the multi-protocol I/O interconnect in response to a peripheral component interconnect express (PCIe) device being connected to the computer apparatus, the first communication path communicatively connecting the PCIe device to the computer apparatus; establishing, by the multiprotocol input-output I/O interconnect, a second communication path between the switching fabric and a PCIe controller; and routing, by the multi-protocol I/O interconnect, PCIe protocol packets of the PCIe device from the PCIe device to the PCIe controller over the first and second communication paths wherein-establishing a first communication path includes establishing, by the multiprotocol input-output I/O interconnect, a virtual PCIe link between at least two adapters implemented by the ports of the switching fabric, in response to the PCIe protocol packets having a packet header that includes a protocol defined field specifying maintenance of synchronization between the adapters of the ports of the switching fabric.
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