发明名称 Dynamic instruction splitting
摘要 A data processing apparatus and method are provided. The data processing apparatus is configured to perform data processing operations in response to data processing instructions including a multiple operation instruction, in response to which multiple data processing operations are performed. The data processing apparatus comprises two or more data processing units configured to perform the data processing operations and an instruction arbitration unit configured to perform sub-division of a multiple operation instruction into a plurality of sub-instructions and to perform allocation of the plurality of sub-instructions amongst the two or more data processing units, wherein each sub-instruction is arranged to cause one of the two or more data processing units to perform at least one data processing operation of the multiple data processing operations. The instruction arbitration unit is configured to perform the sub-division and the allocation dynamically in dependence on a current availability of a resource for each of the two or more data processing units, enabling more efficient usage of the resources of each of the data processing units to be made.
申请公布号 US8782378(B2) 申请公布日期 2014.07.15
申请号 US201012923320 申请日期 2010.09.14
申请人 ARM Limited 发明人 Chaussade Nicolas;Teyssier Rémi
分类号 G06F9/38;G06F9/30 主分类号 G06F9/38
代理机构 Nixon & Vanderhye P.C. 代理人 Nixon & Vanderhye P.C.
主权项 1. A data processing apparatus configured to perform data processing operations in response to data processing instructions, wherein said data processing instructions comprise a multiple operation instruction, said data processing apparatus configured to perform multiple data processing operations in response to said multiple operation instruction, said data processing apparatus comprising: two or more data processing units configured to perform said data processing operations; and an instruction arbitration unit configured to perform sub-division of said multiple operation instruction into a plurality of sub-instructions and to perform allocation of said plurality of sub-instructions amongst said two or more data processing units, wherein each sub-instruction is arranged to cause one of said two or more data processing units to perform at least one data processing operation of said multiple data processing operations, wherein said instruction arbitration unit is configured to perform said sub-division and said allocation dynamically in dependence on a current availability of a resource for each of said two or more data processing units, wherein said data processing apparatus is configured to perform register renaming, and said two or more data processing units are register recovery units, said register recovery units being configured to perform register recovery operations as said data processing operations.
地址 Cambridge GB