发明名称 Memory Using Voltage to Improve Reliability for Certain Data Types
摘要 A method for minimizing soft error rates within caches by configuring a cache with a certain way which is more resistant to soft errors and then using this way to store modified data. In certain embodiments, the memory is made more soft error resistant by increasing a voltage across bitcells of the cache.
申请公布号 US2014195733(A1) 申请公布日期 2014.07.10
申请号 US201313736322 申请日期 2013.01.08
申请人 Russell Andrew C.;Ramaraju Ravindraraj 发明人 Russell Andrew C.;Ramaraju Ravindraraj
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
主权项 1. A memory system comprising: a memory array, the memory array comprising a plurality of sections, each of the plurality of sections being individually configurable to operate in a more error resistant mode of operation and a less error resistant mode of operation; and, a memory controller, the memory controller determining whether data to be written to the memory array comprises modified information, the memory controller storing the modified information to a section operating in the more error resistant mode of operation.
地址 Austin TX US