发明名称 |
DIFFERENTIAL SENSE AMPLIFIER FOR SOLID-STATE MEMORIES |
摘要 |
Described embodiments provide a memory having at least one sense amplifier with inputs coupled to at least one pair of bit lines. One of the pair of bit lines is precharged to a power supply voltage and a second one of the pair is precharged to ground. A first switch DC-couples the first one of the pair of bit lines to a first input of a cross-coupled amplifier. A first capacitor AC-couples the second one of the pair of bit lines to a second input of the cross-coupled amplifier. Then a memory cell coupled between the first and second one of the pair of bit lines is enabled. A switch then decouples the first input from the bit line, a second capacitor is used to inject a charge of current into the first input of the cross-coupled amplifier, and then the cross-coupled amplifier is enabled. |
申请公布号 |
US2014192603(A1) |
申请公布日期 |
2014.07.10 |
申请号 |
US201313736528 |
申请日期 |
2013.01.08 |
申请人 |
LSI CORPORATION |
发明人 |
Singh Sahilpreet |
分类号 |
G11C7/06;G11C7/12 |
主分类号 |
G11C7/06 |
代理机构 |
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代理人 |
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主权项 |
1. In a memory having at least one sense amplifier, the at least one sense amplifier comprising:
a cross-coupled gain stage having first and second amplifier nodes; a first switch selectively coupling the first amplifier node to a first input of the sense amplifier; a second switch selectively coupling a first internal node to a second input of the sense amplifier; first capacitor coupled between the first internal node and the second amplifier node; and a second capacitor coupled between the first amplifier node and a second internal node; wherein the first and second switches operate in response to a first control signal. |
地址 |
Milpitas CA US |