发明名称 PROCESSOR WITH SECOND JUMP EXECUTION UNIT FOR BRANCH MISPREDICTION
摘要 A secondary jump execution unit (JEU) is incorporated in a micro-processor to operate concurrently with a primary JEU, enabling the execution of simultaneous branch operations with possible detection of multiple branch mispredicts. When branch operations are executed on both JEUs in a same instruction cycle, mispredict processing for the secondary JEU is skidded into the primary JEU's dispatch pipeline such that the branch processing for the secondary JEU occurs after processing of the branch for the primary JEU and while the primary JEU is not processing a branch. Moreover, in cases when a nuke command is also received from a reorder buffer of the processor, the branch processing for the secondary JEU is further delayed to accommodate processing of the nuke on the primary JEU. Further embodiments support the promotion of the secondary JEU to have access to the mispredict mechanisms of the primary JEU in certain circumstances.
申请公布号 US2014195790(A1) 申请公布日期 2014.07.10
申请号 US201113994676 申请日期 2011.12.28
申请人 Merten Matthew C.;Sodani Avinash;Mirkes Sean P.;Kadgi Vijaykumar B.;Sutanto Bambang;Lai Chia Yin Kevin;Marden Morris;Farcy Alexandre J. 发明人 Merten Matthew C.;Sodani Avinash;Mirkes Sean P.;Kadgi Vijaykumar B.;Sutanto Bambang;Lai Chia Yin Kevin;Marden Morris;Farcy Alexandre J.
分类号 G06F9/38 主分类号 G06F9/38
代理机构 代理人
主权项 1. A processor comprising: a first jump execution unit (JEU) to evaluate a first branch for a first branch mispredict; and a second JEU to evaluate a second branch for a second branch mispredict, the first branch and the second branch being evaluated concurrently.
地址 Hillsboro OR US