ULTRA-WIDEBAND LOSS OF SIGNAL DETECTOR AT A RECEIVER IN A HIGH SPEED SERIALIZER/DESERIALIZER (SERDES) APPLICATION

摘要

An apparatus comprising a first loss of signal circuit, a second loss of a signal circuit and a gate circuit. The first loss of a signal circuit may be configured to (i) receive an input signal containing a series of data and (ii) generate a first indication signal when the input signal is operating within a first frequency range. The second loss of signal circuit may be configured to (i) receive the input signal and (ii) generate a second indication signal when the input signal is operating within a second frequency range. The gate circuit may be configured to generate an output signal in response to either the first indication signal or the second indication signal being active.

主权项

1. An apparatus comprising:
a first loss of signal circuit configured to (i) receive an input signal containing a series of data and (ii) generate a first indication signal when said input signal is operating within a first frequency range; a second loss of signal circuit configured to (i) receive said input signal and (ii) generate a second indication signal when said input signal is operating within a second frequency range; and a gate circuit configured to generate an output signal in response to either said first indication signal or said second indication signal being active.