Memory Having Improved Reliability for Certain Data Types

摘要

A method for minimizing soft error rates within caches by configuring a cache with certain sections to correspond to bitcell topologies that are more resistant to soft errors and then using these sections to store modified data.

主权项

1. A cache system comprising:
a cache array, the cache array comprising a plurality of sections, at least one of the sections comprising bitcells configured with an error resistant bitcell topology and at least another of the sections comprising bitcells configured with a less error resistant bitcell topology; and, cache control logic, the cache control logic determining whether information to be written to the cache array comprises modified information, the cache control logic storing the modified information to the at least one of the sections comprising the cells configured with the error resistant bitcell topology.