发明名称 DIGITAL FILTER CIRCUIT AND DIGITAL FILTER CONTROL METHOD
摘要 <p>[Objective] To provide a digital filter circuit and a digital filter control method which are capable of reducing circuit scale and power consumption for filter processing in a frequency domain such as an overlap FDE method. [Solution] A digital filter circuit according to the present invention includes: an overlap addition means for giving an overlap of M data (M is a positive integer) between the block and the previous block; an FFT processing means for transforming the generated block by FFT processing; a filter computation means for performing filter processing to the transformed block; an IFFT means for transforming the block, which the filter processing was performed to, by IFFT processing; an overlap removal means for removing M units of data from both ends of the transformed block; and a clock generation means for setting the frequency of a filter processing clock signal based on a value of M, wherein the filter processing clock signal drives the data output unit of the overlap addition means, the FFT means, the filter computation means, the IFFT means, and the input unit of the overlap removal means.</p>
申请公布号 EP2658124(A4) 申请公布日期 2014.07.09
申请号 EP20110851747 申请日期 2011.08.18
申请人 NEC CORPORATION 发明人 SHIBAYAMA, ATSUFUMI
分类号 H03H17/02 主分类号 H03H17/02
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