发明名称
摘要 An apparatus and method are provided for handling access operations issued to local cache structures within a data processing apparatus. The data processing apparatus comprises a plurality of processing units each having a local cache structure associated therewith. Shared access coordination circuitry is also provided for coordinating the handling of shared access operations issued to any of the local cache structures. For a shared access operation, the access control circuitry associated with the local cache structure to which that shared access operation is issued will perform a local access operation to that local cache structure, and in addition will issue a shared access signal to the shared access coordination circuitry. For a local access operation, the access control circuitry would normally perform a local access operation on the associated local cache structure, and not notify the shared access coordination circuitry. However, if an access operation extension value is set, then the access control circuitry treats such a local access operation as a shared access operation. Such an approach ensures correction operation even after an operating system and/or an application program are migrated from one processing unit to another.
申请公布号 JP5543022(B2) 申请公布日期 2014.07.09
申请号 JP20130514780 申请日期 2011.05.11
申请人 发明人
分类号 G06F12/08;G06F9/50 主分类号 G06F12/08
代理机构 代理人
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