Adjusting bit-line discharge time in memory arrays based on characterized word-line delay and gate delay

摘要

A memory tracking circuit controls discharge duration of a tracking bit-line based on (i) a signal received at the far end of a tracking row after a propagation delay and (ii) a signal applied to a transistor-based gate delay. The tracking circuit (i) extends the discharge duration when one or more of (a) the propagation delay and (b) the transistor-based gate delay is shorter than an uncontrolled discharge duration of the tracking bit-line, and (ii) does not extend the discharge duration otherwise. Based on the discharge duration, the tracking circuit activates a reset signal that resets a clock-pulse generator to switch the memory from an access operation to a recess state. Controlling the discharge duration, and consequently the reset signal, based on the propagation delay and the gate delay allows the clock-pulse generator to adjust access times to account for the memory array configuration and process, temperature, and voltage conditions.

主权项

1. An integrated circuit having a memory device comprising:
a memory array of memory cells arranged in rows and columns; a clock-pulse generator configured to generate a clock pulse for controlling access to the memory cells in the memory array; and a tracking circuit configured to control a discharge duration of a tracking bit-line of the memory device based on a word-line delay and a gate delay, wherein duration of the clock pulse is controlled based on the controlled discharge duration.