Driver circuit, display device, and electronic device

摘要

To suppress malfunctions in a shift register circuit. A shift register having a plurality of flip-flop circuits is provided. The flip-flop circuit includes a transistor 11, a transistor 12, a transistor 13, a transistor 14, and a transistor 15. When the transistor 13 or the transistor 14 is turned on in a non-selection period, the potential of a node A is set, so that the node A is prevented from entering into a floating state.

主权项

1. A semiconductor device comprising:
a first transistor; a second transistor; a third transistor; a fourth transistor; a fifth transistor; a sixth transistor; a seventh transistor; and an eighth transistor, wherein each of the first to eighth transistors comprises a gate terminal, a source terminal, and a drain terminal, wherein one of the source terminal and the drain terminal of the first transistor is electrically connected to one of the source terminal and the drain terminal of the second transistor, one of the source terminal and the drain terminal of the third transistor, one of the source terminal and the drain terminal of the fourth transistor, and the gate terminal of the fifth transistor, wherein the gate terminal of the third transistor is electrically connected to the gate terminal of the sixth transistor, wherein one of the source terminal and the drain terminal of the fifth transistor is electrically connected to one of the source terminal and the drain terminal of the sixth transistor and is directly connected to one of the source terminal and the drain terminal of the seventh transistor, wherein the gate terminal of the eighth transistor is electrically connected to the other one of the source terminal and the drain terminal of the first transistor and the gate terminal of the first transistor, wherein one of the source terminal and the drain terminal of the eighth transistor is electrically connected to the gate terminal of the fourth transistor, wherein the other one of the source terminal and the drain terminal of the eighth transistor is electrically connected to the other one of the source terminal and the drain terminal of the fourth transistor, and wherein the gate terminal of the second transistor, the gate terminal of the fourth transistor, the gate terminal of the seventh transistor, and the one of the source terminal and the drain terminal of the seventh transistor are electrically isolated from each other.