发明名称 Fully integrated differential LC PLL with switched capacitor loop filter
摘要 A circuit comprising a loop filter, wherein the filter comprises an active integrator configured to generate one or more tuning signals, and a voltage-controlled oscillator (VCO) coupled to the loop filter and configured to generate a feedback signal based on the one or more tuning signals, wherein generating the one or more tuning signals is based on the feedback signal.
申请公布号 US8773184(B1) 申请公布日期 2014.07.08
申请号 US201313860138 申请日期 2013.04.10
申请人 Futurewei Technologies, Inc. 发明人 Petrov Dmitry;Madeira Paul
分类号 H03L7/06;H03L7/091 主分类号 H03L7/06
代理机构 Conley Rose, P.C. 代理人 Conley Rose, P.C. ;Rodolph Grant;Chung Rayhao A.
主权项 1. A circuit comprising: a loop filter, wherein the filter comprises an active integrator configured to generate one or more tuning signals; and a voltage-controlled oscillator (VCO) coupled to the loop filter and configured to generate a feedback signal based on the one or more tuning signals, wherein generating the one or more tuning signals is based on the feedback signal, wherein the loop filter is implemented on an integrated chip, and wherein the loop filter does not comprise a capacitor that is external to the integrated chip and used to generate the tuning signals.
地址 Plano TX US