| 发明名称 | Signal transmission circuit for enhancing signal integrity | ||
| 摘要 | A signal transmission circuit includes a pre-driver and a driver. The pre-driver is configured to generate a first drive signal in response to a first delay signal and a first selection signal and to generate a second drive signal in response to a second delay signal, a second selection signal, and a pulse signal. The driver is configured to drive a transmission signal in response to the first and second drive signals. The first delay signal is enabled at a second time which is later than a first time when an input signal is received, the second delay signal is enabled at a third time which is later than the second time, and the pulse signal is enabled at a fourth time which is delayed by a predetermined delay period from the first time. | ||
| 申请公布号 | US8773175(B2) | 申请公布日期 | 2014.07.08 |
| 申请号 | US201213719016 | 申请日期 | 2012.12.18 |
| 申请人 | SK Hynix Inc. | 发明人 | Shon Kwan Su |
| 分类号 | H03K3/00 | 主分类号 | H03K3/00 |
| 代理机构 | William Park & Associates Patent Ltd. | 代理人 | William Park & Associates Patent Ltd. |
| 主权项 | 1. A signal transmission circuit, the circuit comprising: a pre-driver configured to generate a first drive signal in response to a first delay signal and a first selection signal and to generate a second drive signal in response to a second delay signal, a second selection signal, and a pulse signal; and a driver configured to output a transmission signal in response to the first and second drive signals, wherein the first delay signal is output at a second time which is later than a first time when an input signal is received, the second delay signal is output at a third time which is later than the second time, and the pulse signal is output at a fourth time which is delayed by a predetermined delay period from the first time. | ||
| 地址 | Gyeonggi-do KR | ||