发明名称 Semiconductor device, image display device, storage device, and electronic device
摘要 To provide a semiconductor device with reduced power consumption that includes a selection transistor. To provide a semiconductor device capable of high-speed operation without increasing a power supply potential. A buffer circuit connected to a gate line has a function of generating a potential higher than a high power supply potential by using the high power supply potential and outputs the potential in response to a selection signal. Specifically, a bootstrap circuit boosts a high power supply potential that is input to an inverter that is the closest to an output side in the buffer circuit. Further, the bootstrap circuit boosts the potential when the gate line is selected, and does not boost the potential when the gate line is not selected.
申请公布号 US8773173(B2) 申请公布日期 2014.07.08
申请号 US201213713323 申请日期 2012.12.13
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Watanabe Kazunori
分类号 H03B1/00;H03K3/00 主分类号 H03B1/00
代理机构 Robinson Intellectual Property Law Office, P.C. 代理人 Robinson Eric J.;Robinson Intellectual Property Law Office, P.C.
主权项 1. A semiconductor device comprising: a circuit including a selection transistor; and a buffer circuit electrically connected to a gate of the selection transistor through a first signal line, wherein the buffer circuit comprises: a first inverter and a second inverter that are sequentially connected in series; anda bootstrap circuit,wherein an input terminal of the first inverter is electrically connected to an input signal line to which a selection signal is input,wherein an output terminal of the second inverter is electrically connected to the first signal line,wherein a high-potential input terminal of the first inverter is electrically connected to a second signal line to which a first potential is input,wherein low-potential input terminals of the first inverter and the second inverter are electrically connected to a third signal line to which a second potential lower than the first potential is input, andwherein the bootstrap circuit outputs a third potential higher than the first potential to a high-potential input terminal of the second inverter in response to the selection signal.
地址 Atsugi-shi, Kanagawa-ken JP