Offset screen for shallow source/drain extension implants, and processes and integrated circuits

摘要

A process of integrated circuit manufacturing includes providing (32, 33) a spacer on a gate stack to provide a horizontal offset over the channel region for otherwise-direct application (34) of a PLDD implant dose in semiconductor, additionally depositing (35) a seal substance to provide a screen thickness vertically while thereby augmenting the spacer on the gate stack to provide an increased offset horizontally from the gate stack and form a horizontal screen free of etch, and subsequently providing (36) an NLDD implant dose for NLDD formation. Various integrated circuit structures, devices, and other processes of manufacture, and processes of testing are also disclosed.

主权项

1. A process of integrated circuit manufacturing comprising:
providing a first gate stack and a second gate stack over a substrate; forming a spacer on the sidewalls of the first gate stack and the second gate stack to provide a first horizontal offset over a first channel region under the first gate stack; performing a PLDD implant adjacent the first gate stack having the first horizontal offset provided by said spacer; after performing the PLDD implant, depositing a seal substance over the spacer, the first gate stack and the second gate stack to provide a screen thickness vertically while thereby augmenting the spacer on the second gate stack to provide a second, increased, offset horizontally from the second gate stack; and subsequently providing an NLDD implant dose for NLDD formation using the unetched seal substance as a horizontal screen.