Global hardware supervised power transition management circuits, processes and systems

摘要

An electronic circuit including a bus (3521), a peripheral (3510.i/3552.1) coupled to the bus (3521), the peripheral having a storing circuit (3620.i, 3625.i) for a succession-presetting and a parameter setting currently-effective for peripheral operation on the bus (3521); and a power management circuit (3570) operable in response to a power management transition request (GO_bit) to send a first signal (START_bit_i) to the peripheral, and to initiate a bus frequency transition, and to send a second signal (PER_ENABLE_i) to the peripheral after the bus frequency transition; and the peripheral is responsive to the first signal (START_bit_i) to stall peripheral operation on the bus (3521), the peripheral operable to automatically promote the succession pre-setting to currently-effective status for the peripheral after peripheral operations on the bus (3521) are stalled and responsive to the second signal (PER_ENABLE_i) to re-enable peripheral operation on the bus (3521). Other circuits, devices, systems, apparatus, and processes are disclosed.

主权项

1. An electronic circuit comprising
a bus; a peripheral coupled to said bus, the peripheral having a storing circuit for a succession-presetting and a parameter setting currently-effective for peripheral operation on said bus; and a power management circuit operable in response to a power management transition request to send a first signal to said peripheral, and to initiate a bus frequency transition, and to send a second signal to the peripheral after the bus frequency transition, and said peripheral is responsive to the first signal to stall peripheral operation on said bus, said peripheral operable to automatically promote the succession pre-setting to currently-effective status for the peripheral after peripheral operations on said bus are stalled and responsive to the second signal to re-enable peripheral operation on said bus.