MOSFET including asymmetric source and drain regions

摘要

At least one drain-side surfaces of a field effect transistor (FET) structure, which can be a structure for a planar FET or a fin FET, is structurally damaged by an angled ion implantation of inert or electrically active dopants, while at least one source-side surface of the transistor is protected from implantation by a gate stack and a gate spacer. Epitaxial growth of a semiconductor material is retarded on the at least one structurally damaged drain-side surface, while epitaxial growth proceeds without retardation on the at least one source-side surface. A raised epitaxial source region has a greater thickness than a raised epitaxial drain region, thereby providing an asymmetric FET having lesser source-side external resistance than drain-side external resistance, and having lesser drain-side overlap capacitance than source-side overlap capacitance.

主权项

1. A semiconductor structure comprising a field effect transistor, said field effect transistor including:
a gate stack including a gate dielectric and a gate electrode and located on a substrate; a raised source region having a top surface at a first distance from a horizontal plane including a bottom surface of said gate dielectric and a planar bottom surface contained within said horizontal plane; a raised drain region having a top surface at a second distance from said horizontal surface, wherein said first distance is greater than said second distance; and a buried source region contacting said planar bottom surface of said raised source region, wherein said buried source region and said raised source region comprise different semiconductor materials or have different dopant concentrations.