STUB MINIMIZATION USING DUPLICATE SETS OF TERMINALS FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS

摘要

A microelectronic element (101) having memory storage array function has a front face (105) facing away from a substrate (102) of a microelectronic package (100), and is electrically connected with the substrate through conductive structure (112) extending above the front face (105). First terminals (104) are disposed at locations within first and second sets (114, 124) thereof disposed on respective first and second opposite sides of a theoretical axis (132). The first terminals of each set are configured to carry address information usable to determine an addressable memory location of a memory storage array of the microelectronic element. The first terminals in the first set (114) have signal assignments which are a mirror image of the signal assignments of the first terminals in the second set (124).