发明名称 AD CONVERSION CIRCUIT AND SOLID STATE IMAGING DEVICE
摘要 PROBLEM TO BE SOLVED: To provide an AD conversion circuit and a solid state imaging device that keep AD conversion accuracy intact.SOLUTION: Latch circuits D_0-D_6 are disabled until a first timing when an output signal CO of a comparison section 11 is inverted, and are enabled until a second timing when a delay time of an inverting delay circuit DLY elapses from the first timing. A latch circuit D_7 is enabled until the second timing from a timing related to a start of comparison in the comparison section 11. The latch circuits D_0-D_7 latch output signals CK0-CK7 of delay units DU[0]-DU[7] at the second timing. A determination section 102 determines whether or not the latch circuits D_0-D_7 have accurately latched the output signals CK0-CK7 of the delay units DU[0]-DU[7], and outputs a signal indicating the result of determination to a delay control section 103. The delay control section 103 controls the delay time of the inverting delay circuit DLY on the basis of the result of determination.
申请公布号 JP2014127927(A) 申请公布日期 2014.07.07
申请号 JP20120284604 申请日期 2012.12.27
申请人 OLYMPUS CORP 发明人 YAMAZAKI SUSUMU
分类号 H03M1/56;H03M1/50;H04N5/374;H04N5/378 主分类号 H03M1/56
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