| 摘要 |
A power-on-reset circuit according to one embodiment of the present invention includes: a voltage distribution part which has an NMOS transistor and divides a power voltage based on a ground voltage; a correction part which comprises a common drain amplifier having an NMOS transistor, and amplifies the output of the voltage distribution part; and a reset signal part which outputs a reset signal according to the output of the correction part. A chip area and the variation of the reset signal according to a process deviation are reduced, thereby securing stable operation. |
