Translational Phase Lock Loop and Synthesizer That Eliminates Dividers

摘要

This invention describes a method by which a low cost low phase noise Phase Locked Loop or Phase Locked Loop based Frequency Synthesizer can be realized. The new method, called a Translational Phase Lock Loop or TPLL, allows the conversion of a traditional voltage controlled oscillator or VCO signal so that the phase noise of the VCO signal is substantially identical to the noise that the loop is aimed to correct via comparison to a low noise reference oscillator. It overcomes additional problems associated with traditional and prior art phase lock loops in terms of unwanted spurious signals, complexity, and cost.

主权项

1. A Translational Phase lock Loop (TPLL) frequency Synthesizer consisting of
a Voltage or Current Controlled Oscillator (VCO), a Directional Coupler or Power Splitter that couples part of the VCO output power for the TPLL hereinafter called the coupled output, a Harmonic Mixer that that mixes the coupled output with a known Harmonic of a Translational Signal Source providing a harmonic mixer output that substantially reflects the VCO Phase Noise, a low pass filter that filters the desired harmonic mixer product a phase frequency detector that compares the chosen harmonic mixer product with a Reference Oscillator creating an Error Signal, a Loop Filter which is a Low Pass Filter that filters the Error Signal such that the TPLL phase noise tracks that of the RO within a desired Loop Bandwidth, wherein the Loop Filtered Error Signal is used to fine tune the frequency of the VCO, thus closing the loop for the TPLL.