发明名称 CASCODE BIAS OF POWER MOS TRANSISTORS
摘要 There is disclosed a driver circuit for a power amplifier of class D type having a segmented architecture with at least one current branch which can be powered down in a low power mode of operation of the circuit. The branch comprising a switch with a cascode MOS transistor, the circuit further comprises a bias circuitry adapted for dynamically generating a dynamic bias control signal so as to cause the cascode MOS transistor of the switch to be ‘Off’ in the low power mode.
申请公布号 US2014184328(A1) 申请公布日期 2014.07.03
申请号 US201314136469 申请日期 2013.12.20
申请人 ST-Ericsson SA 发明人 BINET Vincent;ALLIER Emmanuel;AMIARD Francois
分类号 H03F3/217 主分类号 H03F3/217
代理机构 代理人
主权项 1. Driver circuit for a power amplifier of class D type comprising: at least a first output terminal; a high power supply rail receiving a high power supply voltage and a low power supply rail receiving a low supply voltage; at least first and second current branches arranged in parallel between the high power supply rail and the low power supply rail, each comprising at least a first switch and being adapted for driving power to the output terminal, and said second current branch being powered in a first configuration of the driver circuit and being powered down in a second configuration of the driver circuit; wherein: the first switch of the first branch comprises a switching Metal Oxyde Semiconductor, MOS, transistor of a first conduction type, N or P, controlled by a first switching signal, in series with a cascode MOS transistor of said first conduction type, controlled by first static bias control signal; the first switch of the second branch comprises a switching MOS transistor of the first conduction type, controlled by a second switching signal, in series with a cascode MOS transistor of said first conduction type, controlled by a first dynamic bias control signal; and, the driver circuit further comprising a first bias circuitry adapted for dynamically generating the first dynamic bias control signal from the first static bias control signal and from at least one additional control signal enabling operation of the driver circuit in the second configuration, said first bias circuitry being further adapted to cause the cascode MOS transistor of the first switch of the second branch to be ‘Off’ in said second configuration of the driver circuit.
地址 Plan-les-Ouates CH