发明名称 |
TRANSISTOR STRUCTURES AND METHODS FOR MAKING THE SAME |
摘要 |
<p>A transistor device having a deep recessed P+ junction is disclosed. The transistor device comprises a gate and a source on an upper surface of the transistor device, and includes at least one doped well region, wherein the at least one doped well region has a first conductivity type that is different from a conductivity type of a source region within the transistor device and the at least one doped well region is recessed from the upper surface of the transistor device by a depth. The deep recessed P+ junction may be a deep recessed P+ implanted junction within a source contact area. The deep recessed P+ junction may be deeper than a termination structure in the transistor device. The transistor device may be a Silicon Carbide (SiC) MOSFET device.</p> |
申请公布号 |
WO2014105371(A1) |
申请公布日期 |
2014.07.03 |
申请号 |
WO2013US73092 |
申请日期 |
2013.12.04 |
申请人 |
CREE, INC. |
发明人 |
ZHANG, QINGCHUN;HULL, BRETT |
分类号 |
H01L29/78;H01L29/06;H01L29/10;H01L29/739;H01L29/749 |
主分类号 |
H01L29/78 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|