MEMORY SUBSYSTEM PERFORMANCE BASED ON IN-SYSTEM WEAK BIT DETECTION

摘要

A memory subsystem can test a memory device in situ, testing the performance of parameters of operation the device in the system it is built into during production. Thus, the system can detect the specific values that will work for one or more operating parameters for the memory device in actual runtime. A test component embedded in the memory subsystem can perform a stress test and identify specific bits or lines of memory that experience failure under one or more stresses. The system can then map out the failed bits or lines to prevent the bits/lines from being used in runtime of the system.

主权项

1. A method comprising:
receiving a host memory subsystem on a host hardware platform, the host memory subsystem including a memory device; performing a stress test of the memory device in the host memory subsystem with a test component embedded in the host memory subsystem, including testing an operation of the memory device at a performance level higher than a minimum rating guaranteed for the memory device; detecting specific bits that experience failure in response to the stress test; and mapping out the detected specific bits to disallow use of the detected specific bits in runtime operation of the host memory subsystem.