发明名称 |
AUTOMATIC REGISTER PORT SELECTION IN EXTENSIBLE PROCESSOR ARCHITECTURE |
摘要 |
This document discusses, among other things, systems and methods to access n consecutive entries of a register file in a single operation using a register file entry index consisting of B bits, wherein B is less than the binary logarithm of a depth of the register file, which corresponds to the number of entries in the register file, and to automatically select, for a set of register arguments for the n consecutive entries, between a register port for each argument requiring a register port or one or more shared register ports for the set of register arguments according to description of an instruction set architecture associated with the register file. |
申请公布号 |
US2014189318(A1) |
申请公布日期 |
2014.07.03 |
申请号 |
US201213732183 |
申请日期 |
2012.12.31 |
申请人 |
TENSILICA INC. |
发明人 |
Sun Fei |
分类号 |
G06F9/30 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
1. A method, comprising:
accessing n consecutive entries of a register file in a single operation using a register file entry index consisting of B bits; and automatically selecting, for a set of register arguments for the n consecutive entries, between a register port for each argument in the set of register arguments requiring a register port or one or more shared register ports for the set of register arguments according to description of an instruction set architecture associated with the register file, wherein B is less than the binary logarithm of a depth of the register file, and wherein the depth of the register file corresponds to the number of entries in the register file. |
地址 |
Santa Clara CA US |