发明名称 PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
摘要 A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is shared by the plurality of logical processors. The shared higher level cache includes a distributed cache slice for each of the logical processors. The processor includes logic to direct an access that misses in one or more lower level caches of a corresponding logical processor to a subset of the distributed cache slices in a virtual cluster that corresponds to the logical processor. Other processors, methods, and systems are also disclosed.
申请公布号 US2014189239(A1) 申请公布日期 2014.07.03
申请号 US201213729579 申请日期 2012.12.28
申请人 Hum Herbert H.;Ganesh Brinda;Vash James R.;Kumar Ganesh;Puthiyedath Leena K.;Erlanger Scott J.;Dehaemer Eric J.;Moga Adrian C.;Sebot Michelle M.;Carlson Richard L.;Bubien David;Delano Eric 发明人 Hum Herbert H.;Ganesh Brinda;Vash James R.;Kumar Ganesh;Puthiyedath Leena K.;Erlanger Scott J.;Dehaemer Eric J.;Moga Adrian C.;Sebot Michelle M.;Carlson Richard L.;Bubien David;Delano Eric
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项 1. A processor comprising: a plurality of logical processors each having one or more corresponding lower level caches; a shared higher level cache that is shared by the plurality of logical processors, in which the shared higher level cache includes a distributed cache slice for each of the logical processors; and logic to direct an access that misses in one or more lower level caches of a corresponding logical processor to a subset of the distributed cache slices in a virtual cluster that corresponds to the logical processor.
地址 Portland OR US