| 发明名称 |
INTERRUPT MONITORING SYSTEM AND COMPUTER SYSTEM |
| 摘要 |
An interrupt monitoring apparatus includes a storage that stores a given threshold that corresponds to an external interrupt notification; a measuring circuit that measures time that elapses from a time when the external interrupt notification is received until a time when dispatch notification is received from a CPU; a comparing circuit that compares the given threshold and the time measured by the measuring circuit; and an output circuit that outputs to the CPU, a comparison result obtained by the comparing circuit. |
| 申请公布号 |
US2014189185(A1) |
申请公布日期 |
2014.07.03 |
| 申请号 |
US201414198920 |
申请日期 |
2014.03.06 |
| 申请人 |
FUJITSU LIMITED |
发明人 |
Yamashita Koichiro;Yamauchi Hiromasa;Suzuki Takahisa;Kurihara Koji;Odate Naoki |
| 分类号 |
G06F13/24 |
主分类号 |
G06F13/24 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An interrupt monitoring apparatus comprising:
a storage configured to store a given threshold that corresponds to an external interrupt notification; a measuring circuit configured to measure time that elapses from a time when the external interrupt notification is received until a time when dispatch notification is received from a CPU; a comparing circuit configured to compare the given threshold and the time measured by the measuring circuit; and an output circuit configured to output to the CPU, a comparison result obtained by the comparing circuit. |
| 地址 |
Kawasaki-shi JP |
