发明名称 |
SUPPLY-VOLTAGE CONTROL FOR DEVICE POWER MANAGEMENT |
摘要 |
One embodiment provides a method for reducing leakage current in device logic having an operational supply-voltage threshold, a nonzero data-retention supply-voltage threshold, and two or more on-die transistor switches to switchably connect a voltage source to the device logic. After the logic enters an idle period, one or more of the switches are opened to lower a supply voltage of the logic below the operational supply-voltage threshold but above the data-retention supply-voltage threshold. When the logic exits the idle period, one or more of the switches are closed to raise the supply voltage of the logic above the operational supply-voltage threshold. |
申请公布号 |
US2014189386(A1) |
申请公布日期 |
2014.07.03 |
申请号 |
US201213728824 |
申请日期 |
2012.12.27 |
申请人 |
NVIDIA CORPORATION |
发明人 |
Swarna Madhu;Raja Tezaswi |
分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
1. A method for reducing leakage current in logic having an operational supply-voltage threshold for maintaining operation, a nonzero data-retention supply-voltage threshold for retaining data, and two or more on-die transistor switches to switchably connect a voltage source to the logic, the method comprising:
after the logic enters an idle period, opening one or more of the switches to lower a supply voltage of the logic below the operational supply-voltage threshold but above the data-retention supply-voltage threshold; and when the logic exits the idle period, closing one or more of the switches to raise the supply voltage of the logic above the operational supply-voltage threshold. |
地址 |
Santa Clara CA US |