ELECTRON BLOCKING LAYERS FOR ELECTRONIC DEVICES

摘要

Methods and apparatuses for electronic devices such as non-volatile memory devices are described. The memory devices include a multi-layer control dielectric, such as a double or triple layer. The multi-layer control dielectric includes a combination of high-k dielectric materials such as aluminum oxide, hafnium oxide, and/or hybrid films of hafnium aluminum oxide. The multi-layer control dielectric provides enhanced characteristics, including increased charge retention, enhanced memory program/erase window, improved reliability and stability, with feasibility for single or multi state (e.g., two, three or four bit) operation.

主权项

1. A gate stack comprising the following layers in successive order:
a first dielectric layer comprising a tunneling dielectric layer; a charge storage layer on the first dielectric layer; a second dielectric layer comprising a high-k dielectric material on the charge storage layer; a third dielectric layer comprising SiO2 on the second dielectric layer; a fourth dielectric layer comprising Si3N4 on the third dielectric layer; a fifth dielectric layer comprising SiO2 on the fourth dielectric layer, and a sixth dielectric layer comprising a high-k dielectric material on the fifth dielectric layer.