发明名称 Integrated circuit including a clock tree cell
摘要 <p>A block (6, 8) comprises first and second oppositely doped semiconductor wells; contiguous standard cells; and a clock tree cell (30, 32) encircled by standard cells. The clock tree cell comprises a third semiconductor well having same doping type as the doping of the first well, second field-effect transistors in fully depleted silicon-on-insulator (FDSOI) technology, and a semiconductor strip extending continuously around the third well. The semiconductor strip has opposite doping type to the doping of the third well, so as to electrically isolate the third well from the first well. A block (6, 8) comprises first and second oppositely doped semiconductor wells; contiguous standard cells each comprising first field-effect transistors in FDSOI technology; and a clock tree cell (30, 32) encircled by standard cells, so that the clock tree (4) cell is contiguous with standard cells. The clock tree cell comprises a third semiconductor well having same doping type as the doping of the first well, second field-effect transistors in FDSOI technology, each ground plane of each second transistor being located above the third well in order to be electrically biased by way of this third well, and a semiconductor strip extending continuously around the third well. The semiconductor strip has opposite doping type to the doping of the third well, so as to electrically isolate the third well from the first well. An independent claim is included for method for using the integrated circuit.</p>
申请公布号 EP2750180(A2) 申请公布日期 2014.07.02
申请号 EP20130198071 申请日期 2013.12.18
申请人 COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIESALTERNATIVES;STMICROELECTRONICS SA;STMICROELECTRONICS (CROLLES 2) SAS 发明人 THONNART, YVAIN;GIRAUD, BASTIEN;ABOUZEID, FADY;CLERC, SYLVAIN;NOEL, JEAN-PHILIPPE
分类号 H01L21/84;H01L21/8238;H01L27/02;H01L27/118;H01L27/12;H01L29/66;H03K19/177 主分类号 H01L21/84
代理机构 代理人
主权项
地址