发明名称 Graphics system with configurable caches
摘要 A graphics system includes a graphics processor and a cache memory system. The graphics processor includes processing units that perform various graphics operations to render graphics images. The cache memory system may include fully configurable caches, partially configurable caches, or a combination of configurable and dedicated caches. The cache memory system may further include a control unit, a crossbar, and an arbiter. The control unit may determine memory utilization by the processing units and assign the configurable caches to the processing units based on memory utilization. The configurable caches may be assigned to achieve good utilization of these caches and to avoid memory access bottleneck. The crossbar couples the processing units to their assigned caches. The arbiter facilitates data exchanges between the caches and a main memory.
申请公布号 US8766995(B2) 申请公布日期 2014.07.01
申请号 US200611412678 申请日期 2006.04.26
申请人 QUALCOMM Incorporated 发明人 Yu Chun;Jiao Guofang;Du Yun
分类号 G09G5/36;G06T1/20 主分类号 G09G5/36
代理机构 代理人 Gambale, Jr. James R.
主权项 1. An apparatus comprising: a plurality of processing units arranged in a pipeline, the plurality of processing units configured to perform graphics operations to render graphics images; a plurality of caches configured to store data for the plurality of processing units; a crossbar configured to couple the plurality of caches to the plurality of processing units; a control unit configured to ascertain memory utilization by the plurality of processing units and to pre-assign one or more of the plurality of caches to a selected processing unit of the plurality of processing units at the beginning of rendering a frame, image, or batch based on the memory utilization statistics, so that the one or more caches is coupled exclusively to the selected processing unit.
地址 San Diego CA US