发明名称 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
摘要 A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive us used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which causes both ports to establish a data path through the backplane crossbar switch.
申请公布号 US8767756(B2) 申请公布日期 2014.07.01
申请号 US200812292440 申请日期 2008.11.19
申请人 Broadcom Corporation 发明人 Black Alistair D.;Chan Kurt
分类号 H04L12/56 主分类号 H04L12/56
代理机构 McDermott Will & Emery LLP 代理人 McDermott Will & Emery LLP
主权项 1. A switch on a chip providing Fibre Channel switching comprising: a plurality of switch ports, at least one of the switch ports configured to couple to at least one Fibre Channel node and communicate with the Fibre Channel node using Fibre Channel signaling; a serializer/deserializer (SERDES) circuitry coupled to the at least one switch port, the SERDES including a transmission terminal and a receive terminal, wherein the SERDES circuitry is configured to receive serial data and de-multiplex the serial data into aligned characters and recover a receive clock from the data, and multiplex outgoing characters into a transmit data stream; an elasticity buffer memory coupled to the at least one switch port, the elasticity buffer memory configured to compensate for differences between a receive data rate and a transmit data rate on the at least one switch port; a crossbar switch coupled to the at least one switch port, wherein the crossbar switch is configured to selectively couple switch ports on the switch to pass a received Fibre Channel data frame between switch ports on the switch and to direct communications to a second switch when a switch port is remote; a memory including a routing table coupled to the at least one switch port that includes mapping between addresses of nodes and their associated switching ports, wherein the routing table determines a location of a destination node for routing Fibre Channel data frames including whether the destination node is local or remote on the second switch; and a management logic residing on the switch that is configured to provide fairness of access to destination nodes based on attempts to establish communication with the destination node.
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