| 发明名称 | Semiconductor memory device | ||
| 摘要 | A semiconductor memory device includes a random address generation unit configured to receive a multi-bit source address and generate a multi-bit random address and a signal mixing unit configured to mix the multi-bit random address with a data, wherein the random address generation unit has a plurality of transmission lines configured to electrically connect the plurality of input terminals respectively corresponding to bits of the source address and the plurality of output terminals respectively corresponding to bits of the random address in one-to-one correspondence regardless of an order of the bits of the source address. | ||
| 申请公布号 | US8767499(B2) | 申请公布日期 | 2014.07.01 |
| 申请号 | US201113330223 | 申请日期 | 2011.12.19 |
| 申请人 | Hynix Semiconductor Inc. | 发明人 | Choi Dae-Il |
| 分类号 | G11C8/00;G06F21/79 | 主分类号 | G11C8/00 |
| 代理机构 | IP & T Group LLP | 代理人 | IP & T Group LLP |
| 主权项 | 1. A semiconductor memory device, comprising: a random address generation unit configured to receive a multi-bit source address and generate a multi-bit random address; and a signal mixing unit configured to mix the multi-bit random address with a data, wherein the random address generation unit includes a plurality of transmission lines configured to electrically connect the plurality of input terminals respectively corresponding to bits of the source address and the plurality of output terminals respectively corresponding to bits of the random address in one-to-one correspondence regardless of an order of the bits of the source address. | ||
| 地址 | Gyeonggi-do KR | ||