发明名称 Electroless Cu plating for enhanced self-forming barrier layers
摘要 Methods and an apparatus are described for an integrated circuit within which an electroless Cu plated layer having an oxygen content is formed on the top of a seed layer comprising Cu and Mn. The integrated circuit is then exposed to a sufficient high temperature to cause the self-formation of a MnSiOx barrier layer.
申请公布号 US8766342(B2) 申请公布日期 2014.07.01
申请号 US201213425097 申请日期 2012.03.20
申请人 Intel Corporation 发明人 Akolkar Rohan N.
分类号 H01L21/48 主分类号 H01L21/48
代理机构 Blakely, Sokoloff, Taylor & Zafman LLP 代理人 Blakely, Sokoloff, Taylor & Zafman LLP
主权项 1. A semiconductor device, comprising: a dielectric layer having a trench; a MnSiOx layer lining the trench; a seed layer comprising Cu and Mn over the MnSiOx layer; and a first Cu layer having an oxygen content over the seed layer.
地址 Santa Clara CA US