Layout structure of standard cell, standard cell library, and layout structure of semiconductor integrated circuit

摘要

In a layout structure of a standard cell including off transistors 126, 127 unnecessary for logic operation of a circuit, dummy via contacts 116, 117 are disposed on impurity diffusion regions 103, 106 of the off transistors 126, 127, respectively. Dummy metal interconnects 122, 123 are connected to the dummy via contacts 116, 117, respectively. Thus, variations in the density of via contacts, which are one of causes lowering the production yield of semiconductor integrated circuits, is reduced, improving manufacturing defects of the via contacts.

主权项

1. A layout structure of a standard cell having a first transistor, a second transistor, and a third transistor which are connected to each other in series, the first transistor and the second transistor sharing a first impurity diffusion region, and the second transistor and the third transistor sharing a second impurity diffusion region, wherein
at least one dummy via contact is provided on and connected to any one of the first impurity diffusion region and the second impurity diffusion region.