发明名称 Semiconductor memory device and method for inspecting the same
摘要 When the threshold voltage Vth of the transistor in the memory cell is within the allowable range is determined, a memory cell which does not have sufficient data retention characteristics is eliminated. In order to eliminate such a memory cell, the potential of a gate of the transistor is kept at an appropriate potential VGM and the potential of a drain of the transistor is set higher than or equal to VGM. When data is written to the memory cell in this state, the potential of a source of the transistor is expressed as a formula including the threshold voltage Vth, (VGM−Vth). By comparison between the level of the potential and the level of a reference potential, whether the threshold voltage Vth is within the allowable range can be determined.
申请公布号 US8767443(B2) 申请公布日期 2014.07.01
申请号 US201113235967 申请日期 2011.09.19
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Saito Toshihiko
分类号 G11C11/24 主分类号 G11C11/24
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A method for inspecting a semiconductor memory device comprising a memory cell including a capacitor and a transistor, one of a source and a drain of the transistor being connected to the capacitor, and the transistor including an oxide semiconductor, the method comprising the steps of: a first step of turning on the transistor to accumulate electrical charge in the capacitor; a second step of turning off the transistor and setting the other of the source and the drain of the transistor to a floating state after the first step; and a third step of applying a voltage to a gate of the transistor and measuring a potential of the other of the source and the drain of the transistor to inspect a threshold voltage of the transistor after the second step.
地址 Atsugi-shi, Kanagawa-ken JP