发明名称 Embedded DRAM integrated circuits with extremely thin silicon-on-insulator pass transistors
摘要 Integrated circuits having combined memory and logic functions are provided. In one aspect, an integrated circuit is provided. The integrated circuit comprises: a substrate comprising a silicon layer over a BOX layer, wherein a select region of the silicon layer has a thickness of between about three nanometers and about 20 nanometers; at least one eDRAM cell comprising: at least one pass transistor having a pass transistor source region, a pass transistor drain region and a pass transistor channel region formed in the select region of the silicon layer; and a capacitor electrically connected to the pass transistor.
申请公布号 US8766410(B2) 申请公布日期 2014.07.01
申请号 US201113153806 申请日期 2011.06.06
申请人 International Business Machines Corporation 发明人 Cai Jin;Chang Josephine;Chang Leland;Ji Brian L.;Koester Steven John;Majumdar Amlan
分类号 H01L23/58 主分类号 H01L23/58
代理机构 代理人 Alexanian Vazken;Chang, LLC Michael J.
主权项 1. An integrated circuit comprising: a substrate comprising a silicon layer over a buried oxide (BOX) layer, wherein a select region of the silicon layer, an extremely-thin silicon-on-insulator (ETSOI) region, has a thickness of between about three nanometers and about 20 nanometers; at least one embedded dynamic random access memory (eDRAM) cell comprising: at least one pass transistor having a pass transistor source region, a pass transistor drain region and a pass transistor channel region formed in the select region of the silicon layer and a pass transistor gate region over the pass transistor channel region, wherein the pass transistor channel region is undoped and is defined by extension implants in the silicon layer at opposite ends of the pass transistor channel region, and wherein a threshold voltage of the pass transistor is set by a work function of the pass transistor gate region as opposed to the channel region which is undoped;a capacitor electrically connected to the pass transistor; anda doped silicon layer surrounding the capacitor configured to serve as a ground to the capacitor.
地址 Armonk NY US