发明名称 Semiconductor device performing self refresh operation
摘要 When refresh activation signals (REFACT0 to REFACT3) are supplied, the internal memory cells in two or more memory banks (0 to 3) are refreshed. A refresh control circuit performs a first refresh control operation to activate a refresh operation in all of the memory banks when an auto refresh command is supplied, and performs a second refresh control operation to activate a refresh operation in a part of the memory banks when a self refresh command is supplied.
申请公布号 US8767497(B2) 申请公布日期 2014.07.01
申请号 US201213486706 申请日期 2012.06.01
申请人 发明人 Marumoto Mio;Edo Sachiko
分类号 G11C7/00 主分类号 G11C7/00
代理机构 Foley & Lardner LLP 代理人 Foley & Lardner LLP
主权项 1. A semiconductor device comprising: a plurality of memory banks each of which performs a refresh operation on a plurality of memory cells included therein when an associated one of refresh activation signals is activated; and a refresh control circuit that performs a first refresh control operation when an auto refresh command is issued and performs a second refresh control operation when a self refresh command is issued, the refresh control circuit activating all the refresh activation signals during the first refresh control operation, and the refresh control circuit activating a part of the refresh activation signals without activating remaining one or ones of the refresh activation signals during the second refresh control operation.
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