Active transfer time delay for automatic transfer switch

摘要

An automatic transfer switch includes first and second inputs inputting first and second voltages; a first output outputting a start signal; a first timer timing a first time after the second voltage is available; a second timer delaying for up to a second time before outputting a transfer signal, the second time being reduced by the first time when the second voltage is available; a transfer mechanism selectively electrically connecting one of the inputs to a second output; and a circuit cooperating with the inputs and the transfer mechanism, causing the start signal to be output responsive to the voltages not being available, and causing the transfer mechanism to electrically connect the second input to the second output in response to the transfer signal.

主权项

1. An automatic transfer switch comprising:
a first input structured to input a first voltage from a first power source; a second input structured to input a second voltage from a second power source; a first output structured to output a start signal to said second power source; a first timer structured to time a first time after the second voltage is available; a second timer structured to delay for less than or equal to a second time before outputting a transfer signal, the second time being reduced to not less than zero by the first time when the second voltage is available; a second output; a transfer mechanism structured to selectively electrically connect one of said first input and said second input to said second output; and a circuit cooperating with said first input, said second input and said transfer mechanism, said circuit being structured to cause the start signal to be output by said first output responsive to the first and second voltages not being available, said circuit also being structured to cause said transfer mechanism to electrically connect said second input to said second output in response to the transfer signal.