Fast pattern matching

摘要

Disclosed are methods, systems, and articles of manufacture for using pattern matching with an integrated circuit layout including recognizing shapes within the IC layout, identifying features for the shapes, and extracting situations for the respective features. The method may further include simulating the situations to determine a set of situations for modification based on an OPC requirement, modifying the set of situations to improve satisfaction of the OPC requirement, and reintegrating the modified set of situations into the IC layout. The method may also include simulating a subset of the extracted situations to determine aerial images of the subset, and tiling the subset of situations to form a larger aerial image. The method may also include removing overlap from a window based on the situations extracted for the window, calculating a density for each of the situations, and calculating a density for the window based on the density.

主权项

1. A computer implemented method for using pattern matching with an integrated circuit layout, comprising:
using at least one processor to perform a process, the process comprising: determining a canonical set of situations from a set of situations larger than the canonical set; matching a pattern to a situation for the integrated circuit layout to perform design rule check by searching through the canonical set of canonical situations, rather than searching through the integrated circuit layout; and adjusting a portion of the integrated circuit layout, wherein the portion of the integrated circuit layout includes one or more electronic circuit design components associated with the situation.