发明名称 Amplifier circuit
摘要 An amplifier circuit capable of reducing load of a circuit at the previous stage by providing increased input impedance producing less noises. The amplifier circuit includes a fully-differential operational amplifier composed of an inverting input terminal, a non-inverting input terminal receiving a signal different from a signal to be input to the inverting input terminal, an inverting output terminal with the same polarity of the inverting input terminal, and a non-inverting output terminal with reverse polarity; an input impedance element with one end connected to the inverting input terminal; an input impedance element with one end connected to the non-inverting input terminal; and positive feedback impedance elements, with one end of connected to the other end of the input impedance element and the other end connected to the inverting output terminal or to the non-inverting output terminal.
申请公布号 US8766715(B2) 申请公布日期 2014.07.01
申请号 US201113511233 申请日期 2011.08.29
申请人 Asahi Kasei Microdevices Corporation 发明人 Koyama Kazuo
分类号 H03F3/45 主分类号 H03F3/45
代理机构 Morgan, Lewis & Bockius LLP 代理人 Morgan, Lewis & Bockius LLP
主权项 1. An amplifier circuit comprising: a fully-differential operational amplifier including a first input terminal, a second input terminal to which a signal different from a signal to be input to the first input terminal is input, a first output terminal with the same polarity as that of the first input terminal, and a second output terminal with reverse polarity to that of the first input terminal; an input impedance element, one end of which is connected to the first input terminal; a positive feedback impedance element, one end of which is connected to the other end of the input impedance element and the other end of which is connected to the first output terminal; a negative feedback impedance element to be connected between the first input terminal and the second output terminal, wherein relation of: Z3>=(Z2+Z1)×(Z2−2×Z1) divided by (Z2+2×Z1) is among an impedance value Z1 of the input impedance element; an impedance value Z2 of the negative feedback impedance element; and an impedance value Z3 of the positive feedback impedance element.
地址 Tokyo JP