发明名称 Pixel control structure, array, backplane, display, and method of manufacturing
摘要 Pixel control structure for use in a backplane for an electronic display, including a transistor that has a gate, a source, a drain, and an organic semiconductor element. The pixel control structure is formed by a first patterned conductive layer portion, a second patterned conductive layer portion, a dielectric layer portion, and an organic patterned semiconductive layer portion. The dielectric layer portion comprises an overlap region defined by overlap of the second conductive layer portion over the first conductive layer portion. The overlap region defines an overlap boundary, defined by an edge portion of the first patterned conductive layer portion and an edge portion of the second patterned conductive layer portion. The patterned semiconductive layer portion extends over the overlap region and away from the overlap region so as to extend from both first and second edge portions.
申请公布号 US8766244(B2) 申请公布日期 2014.07.01
申请号 US201213559914 申请日期 2012.07.27
申请人 Creator Technology B.V. 发明人 van Aerle Nick A. J. M.;van Veenendaal Erik;van Lieshout Pieter;Sele Christoph Wilhelm;Maas Joris P. V.
分类号 H01L35/24 主分类号 H01L35/24
代理机构 代理人
主权项 1. A pixel control structure for use in a backplane for an electronic display comprising: a transistor that has a gate; a source; a drain; and an organic semiconductor element that is electrically connected to the source and the drain; wherein the pixel control structure is formed by a first patterned conductive layer portion that comprises the gate, a second patterned conductive layer portion that comprises the source and the drain, a dielectric layer portion separating the first and second conductive layer portion, and an organic patterned semiconductive layer portion that comprises the semiconductor element of the transistor; and wherein the first patterned conductive layer portion and the second patterned conductive layer portion respectively have a first edge portion and a second edge portion, said first and second edge portions determining an overlap region wherein the second patterned conductive layer portion overlaps the first patterned conductive layer portion, and the overlap region is bounded along the first and second edge portions, wherein the patterned semiconductive layer portion extends over the overlap region and away from the overlap region so as to extend over both first and second edge portions to thereby shield the dielectric layer from the second edge portion.
地址 Breda NL