System and method for evaluation of a field programmable gate array (FPGA)

摘要

A method for evaluation of a field programmable gate array (FPGA), the method includes: configuring the FPGA to execute, in parallel, an evaluation program and an additional program; wherein an execution of the additional program is being evaluated by the evaluation program; and executing, by the FPGA the evaluation program and the additional program; wherein the executing includes receiving, by a memory controller of the FPGA, captured signals from multiple points of interest of the FPGA; and transferring, by the memory controller of the FPGA, at least a portion of the captured signals to at least one memory space of a memory block via memory channels of the FPGA.

主权项

1. A method for evaluation a field programmable gate array (FPGA), the method comprising:
configuring the FPGA to execute, in parallel, an evaluation program and an additional program; wherein an execution of the additional program is being evaluated by the evaluation program; and executing, by the FPGA the evaluation program and the additional program; wherein the executing comprises:
receiving, by a memory controller of the FPGA, captured signals from multiple points of interest of the FPGA; andtransferring, by the memory controller of the FPGA, at least a portion of the captured signals to at least one memory space of a memory block via memory channels of the FPGA;tagging captured signals; andretrieving captured signals from the memory block based on values of tags associated with the captured signals.