Dynamic detection and identification of the functional state of multi-processor cores

摘要

Exemplary embodiments include a sequential and concurrent status detection and evaluation method for multiple processor cores, including receiving data from a plurality of processor cores, for each of the plurality of processor cores, simultaneously running a built-in self test to determine if each of the plurality of cores has failed, checking the data for a dominant logic state and recording a subset of the plurality of processor cores that have failed.

主权项

1. A sequential processor core status detection method, comprising:
receiving data from a plurality of processor cores; for each of the plurality of processor cores, sequentially running a built-in self test to determine if each of the plurality of cores has failed; storing bits indicating logic states reflecting results of the built-in self tests in a bit-swap structure comprising a plurality of logical swap blocks; checking the data stored the swap blocks to determine a dominant logic state for each processor core; identifying one or more of the processor cores as having failed based on the dominant logic states; recording a history of those processor cores determined to have failed; and excluding from operation those processor cores determined to have failed.