Mechanism for selecting instructions for execution in a multithreaded processor

摘要

In one embodiment, a multithreaded processor includes a plurality of buffers, each configured to store instructions corresponding to a respective thread. The multithreaded processor also includes a pick unit coupled to the plurality of buffers. The pick unit may pick from at least one of the buffers in a given cycle, a valid instruction based upon a thread selection algorithm. The pick unit may further cancel, in the given cycle, the picking of the valid instruction in response to receiving a cancel indication.

主权项

1. A multithreaded processor, comprising:
one or more cores, wherein one of the one or more cores comprises:
a plurality of buffer groups each comprising a plurality of buffers, each configured to store a plurality of instructions corresponding to a respective thread;a pick unit coupled to the plurality of buffer groups and configured to:
concurrently pick, from two or more of the plurality of buffer groups in a given cycle, a respective valid instruction based upon a least recently picked selection algorithm, wherein said least recently picked selection algorithm is applied independently to each buffer group; andan execution pipeline coupled to the pick unit and configured to concurrently execute the respective valid instructions from each of the two or more of the plurality of buffer groups in a given cycle.