发明名称 Silicon carbide semiconductor device
摘要 First, second, fourth, and fifth impurity regions have a first conductivity type, and a third impurity region has a second conductivity type. The first to third impurity regions reach a first layer having the first conductivity type. The fourth and fifth impurity regions are provided on a second layer. First to fifth electrodes are provided on the first to fifth impurity regions, respectively. Electrical connection is established between the first and fifth electrodes, and between the third and fourth electrodes. A sixth electrode is provided on a gate insulating film covering a portion between the fourth and fifth impurity regions.
申请公布号 US8766278(B2) 申请公布日期 2014.07.01
申请号 US201213565388 申请日期 2012.08.02
申请人 Sumitomo Electric Industries, Ltd. 发明人 Hayashi Hideki
分类号 H01L29/15;H01L21/8238 主分类号 H01L29/15
代理机构 Venable LLP 代理人 Venable LLP ;Sartori Michael A.;Riggs F. Brock
主权项 1. A silicon carbide semiconductor device, comprising: a silicon carbide substrate including (1) a first layer having a first conductivity type, (2) a second layer provided on said first layer and having a second conductivity type different from said first conductivity type, (3) a JFET portion, and (4) a MOSFET portion, said silicon carbide substrate having first to fifth impurity regions, each of said first, second, fourth, and fifth impurity regions having said first conductivity type and said third impurity region having said second conductivity type, each of said first to third impurity regions being in said JFET portion and penetrating said second layer and reaching said first layer, said third impurity region being arranged between said first and second impurity regions, each of said fourth and fifth impurity regions being in said MOSFET portion and being provided on said second layer; first to fifth electrodes provided on said first to fifth impurity regions, respectively, said first electrode in said JFET portion and said fifth electrode in said MOSFET portion being electrically connected with each other, said third electrode in said JFET portion and said fourth electrode in said MOSFET portion being electrically connected with each other; a gate insulating film covering a portion between said fourth and fifth impurity regions on said second layer; and a sixth electrode provided on said gate insulating film.
地址 Osaka-Shi JP