发明名称 MICROCOMPUTER
摘要 <p>PROBLEM TO BE SOLVED: To provide a mechanism for providing notification of the existence of a DMA transfer request that is generated during a period in which the DMA transfer is interrupted.SOLUTION: A microcomputer 100 includes: a RAM 1; a CPU 2 that provides notification of a test period in which a RAM test is executed, and executes the test of the RAM 1; a transfer request management unit 4 that has an unprocessing flag 41 that is set to an ON state if a DMA (Direct Access Memory) transfer request is generated during the test period; and a transfer control unit 3 that receives the notification of the test period and the DMA transfer request, executes the DMA transfer request during a period other than the test period and sets the unprocessing flag 41 to the ON state during the test period.</p>
申请公布号 JP2014119944(A) 申请公布日期 2014.06.30
申请号 JP20120274254 申请日期 2012.12.17
申请人 RENESAS ELECTRONICS CORP 发明人 TAKAI HIROYUKI
分类号 G06F13/28 主分类号 G06F13/28
代理机构 代理人
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