| 发明名称 |
NON-VOLATILE MEMORY SYSTEM WITH RESET VERIFICATION MECHANISM AND METHOD OF OPERATION THEREOF |
| 摘要 |
A method of operation of a non-volatile memory system includes: providing a resistive storage element having a high resistance state and a low resistance state; coupling an analog multiplexer to the resistive storage element for applying a bias voltage; and switching between a verification bias and a read bias through the analog multiplexer for increasing a read margin between the high resistance state and the low resistance state. |
| 申请公布号 |
US2014177316(A1) |
申请公布日期 |
2014.06.26 |
| 申请号 |
US201213723965 |
申请日期 |
2012.12.21 |
| 申请人 |
SONY CORPORATION |
发明人 |
Otsuka Wataru;Sumino Jun;Tsushima Tomohito;Kitagawa Makoto;Kunihiro Takafumi |
| 分类号 |
G11C13/00 |
主分类号 |
G11C13/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method of operation of a non-volatile memory system comprising:
providing a resistive storage element having a high resistance state and a low resistance state; coupling an analog multiplexer to the resistive storage element for applying a bias voltage; and switching between a verification bias and a read bias through the analog multiplexer for increasing a read margin between the high resistance state and the low resistance state. |
| 地址 |
Tokyo JP |
