发明名称 |
CLOCK GENERATION CIRCUIT AND CLOCK GENERATION SYSTEM USING THE SAME |
摘要 |
A clock generation circuit includes a counting code generation unit configured to generate counting codes corresponding to a frequency of an input clock when an enable signal is enabled; a control code generation unit configured to decode the counting codes and generate control codes; and a cycle changeable oscillation unit configured to determine a frequency of an output clock in response to the control codes. |
申请公布号 |
US2014176209(A1) |
申请公布日期 |
2014.06.26 |
申请号 |
US201313845586 |
申请日期 |
2013.03.18 |
申请人 |
SK HYNIX INC. |
发明人 |
JI Jung Hwan;LEE Geun Il |
分类号 |
H03L7/099 |
主分类号 |
H03L7/099 |
代理机构 |
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代理人 |
|
主权项 |
1. A clock generation circuit comprising:
a counting code generation unit configured to generate counting codes corresponding to a frequency of an input clock when an enable signal is enabled; a control code generation unit configured to decode the counting codes and generate control codes; and a cycle changeable oscillation unit configured to determine a frequency of an output clock in response to the control codes. |
地址 |
Icheon-si KR |